FPGA Synthesizer

Herma

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So, with the help of @Gman I finally decided on a project (well, he decided for me).

The idea is to make a synthesizer using purely (or at least primarily) digital logic in an FPGA. Ideally I'd also like to forgo the usage of wave-tables and mathematically derive some waveforms (notably sine) by integration. The realistic (though also optimistic) end result for the competition will involve an FPGA development kit, custom PCB, and a lot of head-banging in Modelsim to get my HDL working correctly.

I've already written a bunch of stuff about it for blog posts that I never made on my website so I'll just copy-paste some Word docs into here.
Synopsis

Motivation

The world of synthesizers is vast and open for most to adventure into the realms of audio synthesis. Online anyone can easily find schematics for effects modules for synthesizers, diagrams and descriptions for how to make an oscillator, and pre-made modules to sync systems up with existing equipment. However, there doesn’t seem to be too much available in the realm of digital audio synthesis using solely digital logic. The idea of this project is to design, create, and make available a full working design for an FPGA-based digital music synthesizer. The design shall include all the core blocks in common sound chips including an oscillator, an envelope generator, a mixer and a MIDI controller.

Project Goals
  • The design shall be controllable through MIDI to allow ease of integration into existing systems.
  • The design shall include a PCB with an integrated DAC.
  • All elements of the design shall be open-sourced in the end.
Required Functionality
  • At least 8 oscillator banks/channels.
  • At least 3 waveforms per oscillator bank.
  • ADSR envelope per channel.
Desired Functions
  • Ring modulation
  • Nose generation
  • At least 10 channels
  • Internal effects chain (distortion/delay/etc.)
Once I have the PCB design and required functionality done if I have time I am open for other suggestions on added functionality. Any other feedback would also be greatly appreciated.

As a bonus here's a quick snippet of the write-up for the description of roughly how I'd like to create the oscillator banks:
Initial Write-up

SYNTH PROJECT PART 1: OSCILLATORS

In the effort to reduce the number of block RAM bits used in the FPGA design and as an academic exercise an integrator approach to get fundamental waveform shapes will be taken. A square wave is trivial to implement in FPGA logic, it is simply a maximum and minimum value being toggled at a certain rate. Fortunately, a square wave integrated yields a triangle wave, and a triangle wave integrated yields a sine wave, or at least something visually/acoustically similar. However, there are some issues in discrete integration.

As you may remember from calculus class,



Where f(t) is your given function, and F(t) is the anti-derivative. There will exist some error or constant in a real-world integral. This can yield issues quickly when you notice we are chaining two integrals together; we would end up getting something as follow:



In short, integration errors add up quickly. Further, we also are running into another fundamental issue: this is all in the continuous time domain, but digital logic is discrete.

The second issue is easier to address. At my university analog signal processing is a prerequisite to taking digital signal processing. On the first day of class the teacher made a comment that DSP is mostly the same as ASP, but you replace all of the integrations with summations. So, in short, an integration in the discrete time domain is…just a bunch of additions. So now you can see:



Thus, we have the integrator as a summation. But what about that error? Well, in differential equations in general you can deal with error by dealing with (or modifying) the initial conditions. The same applies to the discrete domain. Calculation and application of initial conditions will hopefully solve some of these issues. As a second potential methodology of removing integration error a phase-locking approach can potentially be taken on the integrated value. Ideally in finding and subtracting phase error between the two signals the integration error can be mitigated.

So, in short, what's need is an accumulator and a multiplier to scale, then some way to get rid of potential errors in integration.
...

The rest is still a WIP and pending some Modelsim screenshots and code snippets.

Hopefully there will be further progress...
 
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The idea is to make a synthesizer using purely (or at least primarily) digital logic in an FPGA. Ideally I'd also like to forgo the usage of wave-tables and mathematically derive some waveforms (notably sine) by integration. The realistic (though also optimistic) end result for the competition will involve an FPGA development kit, custom PCB, and a lot of head-banging in Modelsim to get my HDL working correctly.
I have no idea what this all is all, and I don't think I ever will follow along what you are doing, but it looks really difficult, good luck!
 

Herma

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Been working on the schematic capture portion of the design. Nearly done, need to work on the power supply. Attached are a couple schematics. DAC + Amp portion is using the same one Gman used for the audio amp for sale on the store. It was chosen because it was essentially the cheapest I2S amp in single quantities on DigiKey that offered speaker and headphone output with switching. And it's been tested/confirmed to be decent.

The USB to MIDI conversion and USB to SPI conversions are taken care of by independent ATSAMD11D microcontrollers. They are pretty cheap ARM Cortex M0 microcontrollers with built-in USB/etc. Will probably spend a bit of time getting those to work. May also design a separate USB to MIDI board in the future if it's something someone may want.

Once the PCBs are ordered I'll probably spend a bit more time working on the FPGA design to get a MIDI interface, SPI controller, and a programmable register file done to test things out. If all this works well I'll create a quick datasheet for the SPI interface and setting/reading from registers from the FPGA. Then maybe I can hopefully continue actually working on the synth portion of the design lol.
 

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Herma

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Full schematics in PDF form. May go and clean up a bit later 'cause some areas look a bit sloppy. On to generating all the footprints so I can actually begin laying this out. Also should probably generate a BOM cost soon.
 

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Herma

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Loool there's actually no FPGA in this revision. Just using a devkit for the time being and this will plug directly into it (it's a DE0-Nano board). Once the HDL is done I can run compilations until I find the cheapest FPGA it can feasibly run on and I'll make a final board with an integrated FPGA.
 

Herma

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Wrote some HDL. Not too much, just went ahead and worked on the SPI slave data transceiver module for getting info to/from a computer using a USB<->SPI converter.

It includes variable CPOL/CPHA settings as parameters in the module, I believe it seemed to work for all CPOL/CPHA unless I am overlooking something (which is entirely possible). It is synchronous to a master oscillator and does edge detection on the SPI clock input, this is done to avoid crossing clock boundaries, but it does limit the overall speed of the SPI transactions by the speed of the master controlling oscillator. Probably somewhere around 3x slower than your master oscillator would be safe enough.

Code is available on github: https://github.com/kairotronix/kt_sound_hdl

Lots of the items in this repo are very obviously a WIP.

Next I'm going to do an I2C master, then an I2S master, then a MIDI input. Then I have to work a bit in Atmel Studio writing USB drivers for the SAMD11 and hopefully I'll have most everything ready for a test when the ordered hardware arrives.

All C code for the SAMD11 will be in a separate git repo when I get to it.
 
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