In January, I noticed a recent Linux kernel patch for the LCD used in the Anbernic RG40XX series of handhelds ( YLM-LBV0400001X-V1 )
https://lkml.iu.edu/hypermail/linux/kernel/2411.0/04250.html
The panel part number prefix is YLM, which stands for Shenzhen Yangliming Electronic Technology Co., Ltd. (Anbernic's Chinese name). I've chased panel manufacturers before for quotes of similar 4" 640x480 panels, and GiantPlus (who makes the TFT glass) enforces a strict 10k pc MOQ. At $10-15 per panel wholesale, it's likely this panel was a big investment for Anbernic!
It uses the same NV3052C controller that the 3.5" 640x480 IPS LCD uses. The patches indicate it's a native landscape panel, and has a 24-bit parallel interface (RGB888)!
This is important because previously, the only 4" 640x480 panel on the market was a portrait, MIPI panel used in the RG405M. MIPI and portrait made it unusable for our projects.
A Reddit post from someone who damaged their RG40XXV corroborates the kernel patch-- the LCD FPC has lots of parallel data lines, indicating it's not MIPI. Furthermore, the RG40XX devices use an Allwinner H700 SOC. The H700 does not have a MIPI DSI PHY, only RGB888.
I purchased an RG40XXV to conduct some experiments. The panel is laminated with a glass bezel.
To reverse engineer the pinout of the LCD, I first made some educated guesses based on the FPC layout and motherboard circuitry, and then wired out pins of interest to a logic analyzer.
Do not reference this pic for LCD pinout information!
The logic analyzer captures made it trivial to identify all the sideband and sync signals. But the order of the color signals was still a mystery. I wired the panel up to an RVL-DD for further testing.
After a couple of days debugging with @Aurelio, we got the RGB bit order figured out and the panel sprang to life!
This screen is much more vibrant than the 3.5" 640x480 IPS!
While I can't share the test bitstream that Aurelio made for RVL-DD, I can share all of the information I gathered along the way. First, here's the final LCD pinout.
The RG40XX drives the backlight at 30mA.
Next, this is the mating connector for the panel:
TE Connectivity 3-2328724-9
https://www.mouser.com/ProductDetail/TE-Connectivity/3-2328724-9?qs=w/v1CP2dgqqcC4iE1R/bkA==
Finally, I've attached a couple files to this post:
https://lkml.iu.edu/hypermail/linux/kernel/2411.0/04250.html
The panel part number prefix is YLM, which stands for Shenzhen Yangliming Electronic Technology Co., Ltd. (Anbernic's Chinese name). I've chased panel manufacturers before for quotes of similar 4" 640x480 panels, and GiantPlus (who makes the TFT glass) enforces a strict 10k pc MOQ. At $10-15 per panel wholesale, it's likely this panel was a big investment for Anbernic!
It uses the same NV3052C controller that the 3.5" 640x480 IPS LCD uses. The patches indicate it's a native landscape panel, and has a 24-bit parallel interface (RGB888)!
This is important because previously, the only 4" 640x480 panel on the market was a portrait, MIPI panel used in the RG405M. MIPI and portrait made it unusable for our projects.
A Reddit post from someone who damaged their RG40XXV corroborates the kernel patch-- the LCD FPC has lots of parallel data lines, indicating it's not MIPI. Furthermore, the RG40XX devices use an Allwinner H700 SOC. The H700 does not have a MIPI DSI PHY, only RGB888.
I purchased an RG40XXV to conduct some experiments. The panel is laminated with a glass bezel.
To reverse engineer the pinout of the LCD, I first made some educated guesses based on the FPC layout and motherboard circuitry, and then wired out pins of interest to a logic analyzer.
Do not reference this pic for LCD pinout information!
The logic analyzer captures made it trivial to identify all the sideband and sync signals. But the order of the color signals was still a mystery. I wired the panel up to an RVL-DD for further testing.
After a couple of days debugging with @Aurelio, we got the RGB bit order figured out and the panel sprang to life!
This screen is much more vibrant than the 3.5" 640x480 IPS!
While I can't share the test bitstream that Aurelio made for RVL-DD, I can share all of the information I gathered along the way. First, here's the final LCD pinout.
The RG40XX drives the backlight at 30mA.
Next, this is the mating connector for the panel:
TE Connectivity 3-2328724-9
https://www.mouser.com/ProductDetail/TE-Connectivity/3-2328724-9?qs=w/v1CP2dgqqcC4iE1R/bkA==
Finally, I've attached a couple files to this post:
- The cleaned up 9-bit SPI init sequence for the 4" 640x480 panel (csv format)
- A DSView logic analyzer capture of various LCD signals (dsl format, contains timing/sync/reset information)
- A basic 3D model of the 4" panel (F3D and STEP format)
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