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I had a question about a possible pin conflict that I was hoping someone could clarify. I am using a 4layertech RVL-DD board with my Ashida build, and the Wii vias for the DI and CK pins coincide with two of the data lines of the MX chip. Nothing specifies that these are addressable data lines...

Hi everyone! I’m a recent electrical engineering graduate (going for my masters now!) and have been eyeing the portablizing community for a few years! Finally got the courage to get started on my first build (Ashida) and wanted to get involved in the forums for all the great resources!